Version 6.0 - 9/1/93
By Dan Hollis
Copyright (C) 1993 MicroImages Software
This document may only be copied unmodified, in its entirety. This document
may only be copied freely, and may not be sold. I make no guarantees as to the
accuracy of this document. I cannot be responsible for the use or misuse of
information contained within this document. Use at your own risk! In any case,
every effort has been taken to ensure this document is as complete and
accurate as possible.
Many thanks to the following people for their contributions!
Markus Gutschke, Alexander Herzlinger, Karsten Isakovic, Thomas Binder,
Julian Reschke, Georges Kesseler, Torbjoern Ose
New in this revision : MAJOR CHANGES! Totally re-organized. Completely
reformatted to 80 columns! Moved things around into a more logical order.
Added "official" OS variables. Added IDE error register (Falcon030/STbook)
thanks to XHDI 1.10 documentation. Now will someone send the rest of the IDE
documentation?
Last few revisions: Cookie jar documentation cleaned up - should be readable
now! A few minor additions (SCC interrupt vectors) and corrections. ACIA
Additions. Extended joystick ports. Master 32bit memory map. Full YM2149
register listing. Various typo corrections.
Still need info on: Floating Point Coprocessor ($FFFA40-$FFFA58)
Realtime Clock ($FFFC21-$FFFC3F)
IDE Controller ($F00000-$F00039)
STACY Display Driver ($FF827E)
Mega STe Cache/Processor Control - Might find myself ($FF8E21)
TT-SCSI Drive Controller NCR-5380 ($FF8781-$FF878F)
TT Clock Chip MC146818A ($FF8961-$FF8963)
Falcon030 NVRAM Addresses - Might find these myself ($??????-$??????)
Any Falcon030 registers I missed - especially video ($??????-$??????)
Corrections, additions, or comments should be sent to me. I can be contacted
at the following addresses:
InterNet : dhollis@bitsink.gbdata.com
Snail : Dan Hollis
c/o ViewTouch Corp.
344 NE Terry Lane
Grants Pass, OR 97526
(503)479-4278
Official HW List Support BBS: The Restaurant at the End of the Universe
24 hours/7 days, 300-14400v.32, 298 megs
The newest files every day!
Call 713-531-6011
Mail to: Whiplash
NOTE: I have moved since the last incarnation of this document! Please note
the new address if you wish to write me!
Address Description Space
-------+----------------------------------------------------------------+-----
########CPU Reset Vectors ######
-------+----------------------------------------------------------------+-----
$000000|Reset : Initial SSP |SP
$000004|Reset : Initial PC |SP
-------+----------------------------------------------------------------+-----
########CPU Exception Vectors ######
-------+----------------------------------------------------------------+-----
$000008|Bus Error |SD
$00000C|Address Error |SD
$000010|Illegal Instruction |SD
$000014|Zero Divide |SD
$000018|CHK, CHK2 Instruction |SD
$00001C|cpTRAPcc, TRAPcc, TRAPV |SD
$000020|Privilege Violation |SD
$000024|Trace |SD
$000028|Line 1010 Emulator (LineA) |SD
$00002C|Line 1111 Emulator (LineF) |SD
$000030|(Unassigned, Reserved) |SD
$000034|Coprocessor Protocol Violation (68030) |SD
$000038|Format Error (68010) |SD
$00003C|Uninitialized Interrupt Vector |SD
$000040|(Unassigned, Reserved) |SD
: | : : | :
$00005F|(Unassigned, Reserved) |SD
$000060|Spurious Interrupt (Bus error during interrupt) |SD
-------+----------------------------------------------------------------+-----
########Auto-Vector Interrupts ######
-------+----------------------------------------------------------------+-----
$000064|Level 1 Int Autovector (TT VME) |SD
$000068|Level 2 Int Autovector (HBL) |SD
$00006C|Level 3 Int Autovector (TT VME) |SD
$000070|Level 4 Int Autovector (VBL) |SD
$000074|Level 5 Int Autovector |SD
$000078|Level 6 Int Autovector (MFP) |SD
$00007C|Level 7 Int Autovector |SD
-------+----------------------------------------------------------------+-----
########Trap Instruction Vectors (Trap #n = Vector number + 32 + n) ######
-------+----------------------------------------------------------------+-----
$000080|Trap #0 |SD
$000084|Trap #1 (GemDOS) |SD
$000088|Trap #2 (AES/VDI) |SD
$0000B4|Trap #13 (BIOS) |SD
$0000B8|Trap #14 (XBIOS) |SD
-------+----------------------------------------------------------------+-----
########Math Coprocessor Vectors (68881/68882/Internal) ######
-------+----------------------------------------------------------------+-----
$0000C0|FFCP Branch or Set on Unordered Condition |SD
$0000C4|FFCP Inexact Result |SD
$0000C8|FFCP Divide by Zero |SD
$0000CC|FFCP Underflow |SD
$0000D0|FFCP Operand Error |SD
$0000D4|FFCP Overflow |SD
$0000D8|FFCP Signaling NAN |SD
$0000DC|(Unassigned, Reserved) |SD
-------+----------------------------------------------------------------+-----
########PMMU Coprocessor Vectors (68851/Internal) ######
-------+----------------------------------------------------------------+-----
$0000E0|MMU Configuration Error |SD
$0000E4|MC68851, not used by MC68030 |SD
$0000E8|MC68851, not used by MC68030 |SD
-------+----------------------------------------------------------------+-----
########Miscellaneous Vectors ######
-------+----------------------------------------------------------------+-----
$0000EC|(Unassigned, Reserved) |SD
: | : : | :
$0000FF|(Unassigned, Reserved) |SD
-------+----------------------------------------------------------------+-----
########User Assigned Interrupt Vectors ######
-------+----------------------------------------------------------------+-----
$000100|ST-MFP-0 - Centronics busy |SD
$000104|ST-MFP-1 - RS-232 DCD |SD
$000108|ST-MFP-2 - RS-232 CTS |SD
$00010C|ST-MFP-3 - Blitter done |SD
$000110|ST-MFP-4 - Timer D (USART timer) |SD
$000114|ST-MFP-5 - Timer C (200hz Clock) |SD
$000118|ST-MFP-6 - Keyboard/MIDI (ACIA) |SD
$00011C|ST-MFP-7 - FDC/HDC |SD
$000120|ST-MFP-8 - Timer B (HBL) |SD
$000124|ST-MFP-9 - Send Error |SD
$000128|ST-MFP-10 - Send buffer empty |SD
$00012C|ST-MFP-11 - Receive error |SD
$000130|ST-MFP-12 - Receive buffer full |SD
$000134|ST-MFP-13 - Timer A (STe sound) |SD
$000138|ST-MFP-14 - RS-232 Ring detect |SD
$00013C|ST-MFP-15 - GPI7 - Monochrome Detect |SD
$000140|TT-MFP-0 - GPI 0 |SD
$000144|TT-MFP-1 - GPI 1 |SD
$000148|TT-MFP-2 - GPI 2 |SD
$00014C|TT-MFP-3 - GPI 3 |SD
$000150|TT-MFP-4 - Timer D |SD
$000154|TT-MFP-5 - Timer C |SD
$000158|TT-MFP-6 - GPI 4 |SD
$00015C|TT-MFP-7 - GPI 5 |SD
$000160|TT-MFP-8 - Timer B |SD
$000164|TT-MFP-9 - Send Error |SD
$000168|TT-MFP-10 - Send buffer empty |SD
$00016C|TT-MFP-11 - Receive error |SD
$000170|TT-MFP-12 - Receive buffer full |SD
$000174|TT-MFP-13 - Timer A |SD
$000176|TT-MFP-14 - GPI 6 |SD
$00017C|TT-MFP-15 - GPI 7 |SD
$000180|SCC Interrupt |SD
$0001BC|SCC Interrupt |SD
$0001C0|User Defined, Unused |SD
: | : : : | :
$0003FC|User Defined, Unused |SD
-------+----------------------------------------------------------------+-----
Address Size Description Name
-------+-----+-----------------------------------------------------+----------
System Crash Page
-------+-----+-----------------------------------------------------+----------
$000380|long |Validates System Crash Page if $12345678 |proc_lives
$000384|.....|Saved registers D0-D7 |proc_dregs
$0003A4|.....|Saved registers A0-A7 |proc_aregs
$0003C4|long |Vector number of crash exception |proc_enum
$0003C8|long |Saved USP |proc_usp
$0003CC|.....|Saved 16 words from exception stack |proc_stk
-------+-----+-----------------------------------------------------+----------
System Variables
-------+-----+-----------------------------------------------------+----------
$000400|long |GEM Event timer vector |etv_timer
$000404|long |GEM Critical error handler |etv_critic
$000408|long |GEM Program termination vector |etv_term
$00040C|long |GEM Additional vector #1 (Unused) |etv_xtra
: | : | : : : : : | :
$00041C|long |GEM Additional vector #5 (Unused) |etv_xtra
$000420|long |Validates memory configuration if $752019F3 |memvalid
$000424|word |Copy of contents of $FF8001 |memctrl
$000426|long |Validates resvector if $31415926 |resvalid
$00042A|long |Reset vector |resvector
$00042E|long |Physical top of RAM |phystop
$000432|long |Start of TPA (user memory) |_membot
$000436|long |End of TPA (user memory) |_memtop
$00043A|long |Validates memcntrl and memconf if $237698AA |memval2
$00043E|word |If nonzero, floppy disk VBL routine is disabled |flock
$000440|word |Floppy Seek rate - 0:6ms, 1:12ms, 2:2ms, 3:3ms |seekrate
$000442|word |Time between two timer calls (in milliseconds) |_timer_ms
$000444|word |If not zero, verify floppy disk writes |_fverify
$000446|word |Default boot device |_bootdev
$000448|word |0 - NTSC (60hz), <>0 - PAL (50hz) |palmode
$00044A|word |Default video resolution |defshiftmod
$00044C|word |Copy of contents of $FF8260 |sshiftmod
$00044E|long |Pointer to video RAM (logical screen base) |_v_bas_ad
$000452|word |If not zero, VBL routine is not executed |vblsem
$000454|word |Number of vertical blank routines |nvbls
$000456|long |Pointer to list of vertical blank routines |_vblqueue
$00045A|long |If not zero, points to color palette to be loaded |colorptr
$00045E|long |If not zero, points to video ram for next VBL |screenpt
$000462|long |Counter for number of VBLs |_vbclock
$000466|long |Number of VBL routines executed |_frclock
$00046A|long |Vector for hard disk initialization |hdv_init
$00046E|long |Vector for resolution change |swv_vec
$000472|long |Vector for getbpb for hard disk |hdv_bpb
$000476|long |Vector for read/write routine for hard disk |hdv_rw
$00047A|long |Vector for hard disk boot |hdv_boot
$00047E|long |Vector for hard disk media change |hdv_mediach
$000482|word |If not zero, attempt to load "COMMAND.PRG" on boot |_comload
$000484|byte |Attribute vector for console output BIT 3 2 1 0|conterm
| |Return "kbshift" for BIOS conin --------------' | | ||
| |System bell (1 - on) ---------------------------' | ||
| |Key repeat (1 - on) ------------------------------' ||
| |Key click (1 - on) ---------------------------------'|
$000486|long |Return address for TRAP #14 (unused)|trp14ret
$00048A|long |Return address for critical error handler (unused)|criticret
$00048E|long |Memory descriptor block |themd
$00049E|long |Space for additional memory descriptors |themdmd
$0004A2|long |Pointer to BIOS save registers block |savptr
$0004A6|word |Number of connected floppy drives |_nflops
$0004A8|long |Vector for screen output |con_state
$0004AC|word |Temporary storage for cursor line position |save_row
$0004AE|long |Pointer to save area for exception processing |sav_context
$0004B2|long |Pointer to buffer control block for GEMDOS data |_bufl
$0004B6|long |Pointer to buffer control block for GEMDOS fat/dir |_bufl
$0004BA|long |Counter for 200hz system clock |_hz_200
$0004BC|long |Pointer to default environment string |the_env
$0004C2|long |Bit allocation for physical drives (bit 0=A, 1=B..) |_drvbits
$0004C6|long |Pointer to 1024-byte disk buffer |_dskbufp
$0004CA|long |Pointer to autoexecute path |_autopath
$0004CE|long |Pointer to VBL routine #1 |_vbl_lis
: | : | : : : : : | :
$0004EA|long |Pointer to VBL routine #8 |_vbl_lis
$0004EE|word |Flag for screen -> printer dump |_dumpflg
$0004F0|word |Printer abort flag |_prtabt
$0004F2|long |Pointer to start of OS |_sysbase
$0004F6|long |Global shell pointer |_shell_p
$0004FA|long |Pointer to end of OS |end_os
$0004FE|long |Pointer to entry point of OS |exec_os
$000502|long |Pointer to screen dump routine |scr_dump
$000506|long |Pointer to _lstostat() |prv_lsto
$00050A|long |Pointer to _lstout() |prv_lst
$00050E|long |Pointer to _auxostat() |prv_auxo
$000512|long |Pointer to _auxout() |prv_aux
$000516|long |If AHDI, pointer to pun_info |pun_ptr
$00051A|long |If $5555AAAA, reset |memval3
$00051E|long |8 Pointers to input-status routines |xconstat
$00053E|long |8 Pointers to input routines |xconin
$00055E|long |8 Pointers to output-status routines |xcostat
$00057E|long |8 Pointers to output routines |xconout
$00059E|word |If not 0, then not 68000 - use long stack frames |_longframe
$0005A0|long |Pointer to cookie jar |_p_cookies
$0005A4|long |Pointer to end of FastRam |ramtop
$0005A8|long |Validates ramtop if $1357BD13 |ramvalid
$0005AC|long |Pointer to routine for system bell |bell_hook
$0005B0|long |Pointer to routine for system keyclick |kcl_hook
-------+-----+-----------------------------------------------------+----------
Address Size Description Bits used Read/Write
-------+-----+-----------------------------------------------------+----------
OS ROMs
-------+-----+-----------------------------------------------------+----------
$E00000|byte |TOS 512k ROMs |R
: | : | : : : |:
$EFFFFF|byte |TOS 512k ROMs |R
-------+-----+-----------------------------------------------------+----------
ADSPEED Configuration registers
-------+-----+-----------------------------------------------------+----------
$F00000|byte |Switch to 16 Mhz |W
$F10000|byte |Switch to 8 Mhz |W
$F20000|byte |Turn on high speed ROM option in 16 Mhz |W
$F30000|byte |Turn off high speed ROM option |W
$F40000|byte |Unknown |W
$F50000|byte |Turn off cache while in 16 Mhz |W
| | >> Write 0 to an address to set it. << |
-------+-----+-----------------------------------------------------+----------
IDE Controller (Falcon, ST-Book, IDE cards)
-------+-----+-----------------------------------------------------+----------
$F00000|long |Data Register |R/W
$F00005|byte |Error Register BIT 7 6 5 4 3 2 1 0|R
| |Bad block mark -----------------------' | | | | | | ||
| |Uncorrectable error --------------------' | | | | | ||
| |Media change -----------------------------' | | | | ||
| |ID-Field not found -------------------------' | | | ||
| |Media change requested -----------------------' | | ||
| |Command aborted --------------------------------' | ||
| |Track 0 not found --------------------------------' ||
| |DAM not found --------------------------------------'|
$F00009|byte |Sector Count Register |W
$F0000D|byte |Sector Number Register |W
$F00011|byte |Cylinder Low Register |W
$F00015|byte |Cylinder High Register |W
$F00019|byte |Drive Head Register |W
$F0001D|byte |Status Register |R
$F0001D|byte |Command Register |W
$F00039|byte |Alternate Status Register |R
$F00039|byte |Data Output Register |W
-------+-----+-----------------------------------------------------+----------
ST MMU Controller
-------+-----+-----------------------------------------------------+----------
$FF8001|byte |MMU memory configuration BIT 3 2 1 0|R/W
| |Bank 0 | | | ||
| |00 - 128k ------------------------------------+-+ | ||
| |01 - 512k ------------------------------------+-+ | ||
| |10 - 2m --------------------------------------+-+ | ||
| |11 - reserved --------------------------------+-' | ||
| |Bank 1 | ||
| |00 - 128k ----------------------------------------+-+|
| |01 - 512k ----------------------------------------+-+|
| |10 - 2m ------------------------------------------+-+|
| |11 - reserved ------------------------------------+-'|
-------+-----+-----------------------------------------------------+----------
Falcon030 Processor Control
-------+-----+-----------------------------------------------------+----------
$FF8007|byte |Falcon Bus Control BIT 5 . . 2 . 0|R/W (F030)
| |STe Bus Emulation (0 - on) ---------------' | ||
| |Blitter (0 - 8mhz, 1 - 16mhz) ------------------' ||
| |68030 (0 - 8mhz, 1 - 16mhz) ------------------------'|
-------+-----+-----------------------------------------------------+----------
SHIFTER Video Controller
-------+-----+-----------------------------------------------------+----------
$FF8201|byte |Video screen memory position (High byte) |R/W
$FF8203|byte |Video screen memory position (Mid byte) |R/W
$FF820D|byte |Video screen memory position (Low byte) |R/W (STe)
$FF8205|byte |Video address pointer (High byte) |R
$FF8207|byte |Video address pointer (Mid byte) |R
$FF8209|byte |Video address pointer (Low byte) |R
$FF820E|word |Offset to next line |R/W (F030)
$FF820F|byte |Width of a scanline (width in words-1) |R/W (STe)
$FF8210|word |Width of a scanline (width in words) |R/W (F030)
$FF8265|byte |Horizontal scroll register (0-15) |R/W (STe)
-------+-----+-----------------------------------------------------+----------
$FF820A|byte |Video synchronization mode BIT 1 0|R/W
| |0 - 60hz, 1 - 50hz -------------------------------+ ||
| |0 - internal, 1 - external sync ------------------' || (TT)
| |0 - internal, 1 - external sync --------------------'| (!TT)
-------+-----+-----------------------------------------------------+----------
| | BIT 11111198 76543210|
| | 543210 |
| | ST color value .....RRr .GGr.BBb|
| | STe color value ....rRRR gGGGbBBB|
$FF8240|word |Video palette register 0 Lowercase = LSB|R/W
: | : | : : : : | :
$FF825E|word |Video palette register 15 |R/W
-------+-----+-----------------------------------------------------+----------
$FF8260|byte |Shifter resolution BIT 1 0|R/W
| |00 320x200x4 bitplanes (16 colors) ---------------+-+|
| |01 640x200x2 bitplanes (4 colors) ----------------+-+|
| |10 640x400x1 bitplane (1 colors) ----------------+-'|
$FF8262|word |TT Shifter resolution BIT 15 . . 12|R/W (TT)
| |Sample/Hold mode ----------------------------' ||
| |Hypermono mode -------------------------------------'|
| |Video Mode BIT 10 9 8|
| |000 320x200x4 bitplanes (16 colors) -----------+-+-+|
| |001 640x200x2 bitplanes (4 colors) ------------+-+-+|
| |010 640x400x1 bitplane (2 colors)(Duochrome) -+-+-+|
| |100 640x480x4 bitplanes (16 colors) -----------+-+-+|
| |110 1280x960x1 bitplane (2 colors) ------------+-+-+|
| |111 320x480x8 bitplanes (256 colors) ----------+-+-'|
| |ST Palette Bank BIT 3 2 1 0|
-------+-----+-----------------------------------------------------+----------
$FF827E|???? |STACY Display Driver |???(STACY)
-------+-----+-----------------------------------------------------+----------
| | BIT 11111198 76543210|
| | 543210 |
| | TT color value ....RRRr GGGgBBBb|
$FF8400|word |TT Palette 0 Lowercase = LSB|R/W (TT)
: | : | : : : | : :
$FF85FE|word |TT Palette 255 |R/W (TT)
-------+-----+-----------------------------------------------------+----------
Falcon030 VIDEL Video Controller
-------+-----+-----------------------------------------------------+----------
$FF8006|byte |Monitor Type BIT 1 0|R (F030)
| |00 - Monochrome (SM124) --------------------------+-+|
| |01 - Color (SC1224) ------------------------------+-+|
| |10 - VGA Color -----------------------------------+-+|
| |11 - Television ----------------------------------+-'|
$FF820E|word |Offset to next line |R/W (F030)
$FF8210|word |VWRAP - Linewidth in words |R/W (F030)
$FF8266|word |SPSHIFT BIT 10 . 8 . 6 5 4 . . . .|R/W (F030)
| |2-colour mode ------------------' | | | | |
| |Truecolour mode --------------------' | | | |
| |Use external hsync ---------------------' | | |
| |Use external vsync -----------------------' | |
| |Bitplane mode ------------------------------' |
| +-----------------------------------------------------+
| | Horizontal Control Registers (9bit)|
$FF8280|word |HHC - Horizontal Hold Counter |R (F030)
$FF8282|word |HHT - Horizontal Hold Timer |R/W (F030)
$FF8284|word |HBB - Horizontal Border Begin |R/W (F030)
$FF8286|word |HBE - Horizontal Border End |R/W (F030)
$FF8288|word |HDB - Horizontal Display Begin |R/W (F030)
$FF828A|word |HDE - Horizontal Display End |R/W (F030)
$FF828C|word |HSS - Horizontal SS |R/W (F030)
$FF828E|word |HFS - Horizontal FS |R/W (F030)
$FF8290|word |HEE - Horizontal EE |R/W (F030)
| +-----------------------------------------------------+
| | Vertical Control Registers (10bit)|
$FF82A0|word |VFC - Vertcial Frequency Counter |R (F030)
$FF82A2|word |VFT - Vertical Frequency Timer |R/W (F030)
$FF82A4|word |VBB - Vertical Border Begin |R/W (F030)
$FF82A6|word |VBE - Vertical Border End (count in 1/2 lines)|R/W (F030)
$FF82A8|word |VDB - Vertical Display Begin |R/W (F030)
$FF82AA|word |VDE - Vertical Display End |R/W (F030)
$FF82AC|word |VSS - Vertical SS |R/W (F030)
| +-----------------------------------------------------+
$FF82C2|word |VCO - Video Control BIT 3 2 1 0|R/W (F030)
| |Quarter pixel width (quadruple pixels) -------' | | ||
| |Half pixel width (double pixels) ---------------' | ||
| |Skip line (interlace) ----------------------------' ||
| |Line doubling --------------------------------------'|
-------+-----+-----------------------------------------------------+----------
DMA/WD1772 Disk controller
-------+-----+-----------------------------------------------------+----------
$FF8600| |Reserved |
$FF8602| |Reserved |
$FF8604|word |FDC access/sector count |R/W
$FF8606|word |DMA mode/status BIT 2 1 0|R
| |Condition of FDC DATA REQUEST signal -----------' | ||
| |0 - sector count null,1 - not null ---------------' ||
| |0 - no error, 1 - DMA error ------------------------'|
$FF8606|word |DMA mode/status BIT 8 7 6 . 4 3 2 1 .|W
| |0 - read FDC/HDC,1 - write ---------' | | | | | | | |
| |0 - HDC access,1 - FDC access --------' | | | | | | |
| |0 - DMA on,1 - no DMA ------------------' | | | | | |
| |Reserved ---------------------------------' | | | | |
| |0 - FDC reg,1 - sector count reg -----------' | | | |
| |0 - FDC access,1 - HDC access ----------------' | | |
| |0 - pin A1 low, 1 - pin A1 high ----------------' | |
| |0 - pin A0 low, 1 - pin A0 high ------------------' |
$FF8609|byte |DMA base and counter (High byte) |R/W
$FF860B|byte |DMA base and counter (Mid byte) |R/W
$FF860D|byte |DMA base and counter (Low byte) |R/W
-------+-----+-----------------------------------------------------+----------
TT-SCSI DMA Controller
-------+-----+-----------------------------------------------------+----------
$FF8701|byte |DMA Address Pointer (Highest byte) |R/W (TT)
$FF8703|byte |DMA Address Pointer (High byte) |R/W (TT)
$FF8705|byte |DMA Address Pointer (Low byte) |R/W (TT)
$FF8707|byte |DMA Address Pointer (Lowest byte) |R/W (TT)
$FF8709|byte |DMA Byte Count (Highest byte) |R/W (TT)
$FF870B|byte |DMA Byte Count (High byte) |R/W (TT)
$FF870D|byte |DMA Byte Count (Low byte) |R/W (TT)
$FF870F|byte |DMA Byte Count (Lowest byte) |R/W (TT)
$FF8710|word |Residue Data Register (High Word) |R (TT)
$FF8712|word |Residue Data Register (Low Word) |R (TT)
$FF8715|byte |Control register BIT 7 6 . . . . 1 0|R/W (TT)
| |Bus error ----------------------------' | | ||
| |Byte count zero ------------------------' | ||
| |Enable -------------------------------------------' ||
| |DMA Direction (1 - out to port) --------------------'|
-------+-----+-----------------------------------------------------+----------
TT-SCSI Drive Controller NCR 5380
-------+-----+-----------------------------------------------------+----------
$FF8781|byte |Data register |R/W (TT)
$FF8783|byte |Init-Command Register |R/W (TT)
$FF8785|byte |Mode Register |R/W (TT)
$FF8787|byte |Target-Command Register |R/W (TT)
$FF8789|byte |ID Select/SCSI Control Register |R/W (TT)
$FF878B|byte |Status Register |R/W (TT)
$FF878D|byte |Target Receive/Input Data |R/W (TT)
$FF878F|byte |Initiate Receive/Reset |R/W (TT)
-------+-----+-----------------------------------------------------+----------
YM2149 Sound Chip
-------+-----+-----------------------------------------------------+----------
$FF8800|byte |Read data/Register select |R/W
| |0 Channel A Freq Low BIT 7 6 5 4 3 2 1 0|
| |1 Channel A Freq High BIT 3 2 1 0|
| |2 Channel B Freq Low BIT 7 6 5 4 3 2 1 0|
| |3 Channel B Freq High BIT 3 2 1 0|
| |4 Channel C Freq Low BIT 7 6 5 4 3 2 1 0|
| |5 Channel C Freq High BIT 3 2 1 0|
| |6 Noise Freq BIT 5 4 3 2 1 0|
| |7 Mixer Control BIT 7 6 5 4 3 2 1 0|
| | Port B IN/OUT (1=Output) -----------' | | | | | | ||
| | Port A IN/OUT ------------------------' | | | | | ||
| | Channel C Noise (1=Off) ----------------' | | | | ||
| | Channel B Noise --------------------------' | | | ||
| | Channel A Noise ----------------------------' | | ||
| | Channel C Tone (0=On) ------------------------' | ||
| | Channel B Tone ---------------------------------' ||
| | Channel A Tone -----------------------------------'|
| |8 Channel A Amplitude Control BIT 4 3 2 1 0|
| | Fixed/Variable Level (0=Fixed) -----------' | | | ||
| | Amplitude level control --------------------+-+-+-'|
| |9 Channel B Amplitude Control BIT 4 3 2 1 0|
| | Fixed/Variable Level ---------------------' | | | ||
| | Amplitude level control --------------------+-+-+-'|
| |10 Channel C Amplitude Control BIT 4 3 2 1 0|
| | Fixed/Variable Level ---------------------' | | | ||
| | Amplitude level control --------------------+-+-+-'|
| |11 Envelope Period High BIT 7 6 5 4 3 2 1 0|
| |12 Envelope Period Low BIT 7 6 5 4 3 2 1 0|
| |13 Envelope Shape BIT 3 2 1 0|
| | Continue -----------------------------------' | | ||
| | Attack ---------------------------------------' | ||
| | Alternate --------------------------------------' ||
| | Hold ---------------------------------------------'|
| | 00xx - \____________________________________ |
| | 01xx - /|___________________________________ |
| | 1000 - \|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\ |
| | 1001 - \____________________________________ |
| | 1010 - \/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\ |
| | 1011 - \|----------------------------------- |
| | 1100 - /|/|/|/|/|/|/|/|/|/|/|/|/|/|/|/|/|/|/ |
| | 1101 - /------------------------------------ |
| | 1110 - /\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/ |
| | 1111 - /|___________________________________ |
| |14 Port A BIT 7 6 5 4 3 2 1 0|
| | IDE Drive On/OFF -------------------+ | | | | | | || (F030)
| | SCC A (0=LAN, 1=Serial2) -----------' | | | | | | || (TT)
| | Monitor jack GPO pin -----------------+ | | | | | ||
| | Internal Speaker On/Off --------------' | | | | | || (F030)
| | Centronics strobe ----------------------' | | | | ||
| | RS-232 DTR output ------------------------' | | | ||
| | RS-232 RTS output --------------------------' | | ||
| | Drive select 1 -------------------------------' | ||
| | Drive select 0 ---------------------------------' ||
| | Drive side select --------------------------------'|
| |15 Port B (Parallel port) |
$FF8802|byte |Write data |W
| +-----------------------------------------------------+
| |Note: PSG Registers are now fixed at these addresses.|
| |All other addresses are masked out on the Falcon. Any|
| |writes to the shadow registers $8804-$88FF will cause|
| |bus errors. Game/Demo coders beware! |
-------+-----+-----------------------------------------------------+----------
DMA Sound System
-------+-----+-----------------------------------------------------+----------
$FF8900|byte |Buffer interrupts BIT 3 2 1 0|R/W (F030)
| |TimerA-Int at end of record buffer -----------' | | ||
| |TimerA-Int at end of replay buffer -------------' | ||
| |MFP-15-Int (I7) at end of record buffer ----------' ||
| |MFP-15-Int (I7) at end of replay buffer ------------'|
-------+-----+-----------------------------------------------------+----------
$FF8901|byte |DMA Control Register BIT 7 . 5 4 . . 1 0|R/W
| |1 - select record register -----------+ | | | || (F030)
| |0 - select replay register -----------' | | | || (F030)
| |Loop record buffer -----------------------' | | || (F030)
| |DMA Record on ------------------------------' | || (F030)
| |Loop replay buffer -------------------------------' || (STe)
| |DMA Replay on --------------------------------------'| (STe)
-------+-----+-----------------------------------------------------+----------
$FF8903|byte |Frame start address (high byte) |R/W (STe)
$FF8905|byte |Frame start address (mid byte) |R/W (STe)
$FF8907|byte |Frame start address (low byte) |R/W (STe)
$FF8909|byte |Frame address counter (high byte) |R (STe)
$FF890B|byte |Frame address counter (mid byte) |R (STe)
$FF890D|byte |Frame address counter (low byte) |R (STe)
$FF890F|byte |Frame end address (high byte) |R/W (STe)
$FF8911|byte |Frame end address (mid byte) |R/W (STe)
$FF8913|byte |Frame end address (low byte) |R/W (STe)
-------+-----+-----------------------------------------------------+----------
$FF8920|byte |DMA Track Control BIT 5 4 . . 1 0|R/W (F030)
| |00 - Set DAC to Track 0 ------------------+-+ | ||
| |01 - Set DAC to Track 1 ------------------+-+ | ||
| |10 - Set DAC to Track 2 ------------------+-+ | ||
| |11 - Set DAC to Track 3 ------------------+-' | ||
| |00 - Play 1 Track --------------------------------+-+|
| |01 - Play 2 Tracks -------------------------------+-+|
| |10 - Play 3 Tracks -------------------------------+-+|
| |11 - Play 4 Tracks -------------------------------+-'|
-------+-----+-----------------------------------------------------+----------
$FF8921|byte |Sound mode control BIT 7 6 . . . . 1 0|R/W (STe)
| |0 - Stereo, 1 - Mono -----------------' | | ||
| |0 - 8bit -------------------------------+ | ||
| |1 - 16bit (F030 only) ------------------' | || (F030)
| |Frequency control bits | ||
| |00 - Off (F030 only) -----------------------------+-+| (F030)
| |00 - 6258hz frequency (STe only) -----------------+-+|
| |01 - 12517hz frequency ---------------------------+-+|
| |10 - 25033hz frequency ---------------------------+-+|
| |11 - 50066hz frequency ---------------------------+-'|
| |Samples are always signed. In stereo mode, data is |
| |arranged in pairs with high pair the left channel,low|
| |pair right channel. Sample length MUST be even in |
| |either mono or stereo mode. |
| |Example: 8 bit Stereo : LRLRLRLRLRLRLRLR |
| | 16 bit Stereo : LLRRLLRRLLRRLLRR (F030) |
| |2 track 16 bit stereo : LLRRllrrLLRRllrr (F030) |
-------+-----+-----------------------------------------------------+----------
STe Microwire Controller (STe/TT only!)
-------+-----+-----------------------------------------------------+----------
$FF8922|byte |Microwire data register |R/W (Mwr)
$FF8924|byte |Microwire mask register |R/W (Mwr)
| +-----------------------------------------------------+
| |!! ATTENTION !! Microwire is now obsolete! It is not |
| |present in the Falcon030 and is unlikely to be in any|
| |future machines. You have been warned. |
| +-----------------------------------------------------+
| |Volume/tone controller commands (Address %10)|
| |Master Volume 10 011 DDDDDD|
| |Left Volume 10 101 .DDDDD|
| |Right Volume 10 100 .DDDDD|
| |Treble 10 010 ..DDDD|
| |Bass 10 001 ..DDDD|
| |Mixer 10 000 ....DD|
| +-----------------------------------------------------+
| |Volume/tone controller values |
| |Master Volume : 0-40 (0 -80dB, 40=0dB) |
| |Left/Right Volume : 0-20 (0 80dB, 20=0dB) |
| |Treble/bass : 0-12 (0 -12dB, 12 +12dB) |
| |Mixer : 0-3 (0 -12dB, 1 mix PSG) |
| | (2 don't mix,3 reserved) |
| +-----------------------------------------------------+
| |Procedure: Set mask register to $7ff. Read data |
| |register and save original value.Write data register.|
| |Compare data register with original value, repeat |
| |until data register returns to original value to |
| |ensure data has been sent over the interface. |
| +-----------------------------------------------------+
| |Interrupts: Timer A can be set to interrupt at the |
| |end of a frame. Alternatively, the GPI7 (MFP mono |
| |detect) can be used to generate interrupts thereby |
| |freeing up Timer A. In this case, the active edge |
| |$FFFA03 must be set by or-ing the active edge of |
| |$FFFA03 with the contents of $FF8260: |
| |$FF8260 - 2 (mono) or.b #$80 with edge |
| |$FF8260 - 0,1 (colour) and.b #$7F with edge |
| |This will generate an interrupt at the START of a |
| |frame, instead of at the end as with Timer A. To |
| |generate an interrupt at the END of a frame, simply |
| |reverse the edge values. |
-------+-----+-----------------------------------------------------+----------
Falcon030 DMA/DSP Controllers
-------+-----+-----------------------------------------------------+----------
$FF8930|word |Crossbar Source Controller |R/W (F030)
| +-----------------------------------------------------+
| |Source: External Input BIT 3 2 1 0|
| |0 - DSP IN, 1 - All others -------------------' | | ||
| |00 - 25.175Mhz clock ---------------------------+-+ ||
| |01 - External clock ----------------------------+-+ ||
| |10 - 32Mhz clock -------------------------------+-' ||
| |0 - Handshake on, 1 - Handshake off ----------------'|
| +-----------------------------------------------------+
| |Source: A/D Convertor BIT 7 6 5 4|
| |1 - Connect, 0 - disconnect ------------------' | | ||
| |00 - 25.175Mhz clock ---------------------------+-+ ||
| |01 - External clock ----------------------------+-+ ||
| |10 - 32Mhz clock (Don't use) -------------------+-' ||
| |0 - Handshake on, 1 - Handshake off ----------------'|
| +-----------------------------------------------------+
| |Source: DMA-PLAYBACK BIT 11 10 9 8|
| |0 - Handshaking on, dest DSP-REC ------------+ | | ||
| |1 - Destination is not DSP-REC --------------' | | ||
| |00 - 25.175Mhz clock ---------------------------+-+ ||
| |01 - External clock ----------------------------+-+ ||
| |10 - 32Mhz clock -------------------------------+-' ||
| |0 - Handshake on, 1 - Handshake off ----------------'|
| +-----------------------------------------------------+
| |Source: DSP-XMIT Bit 15 14 13 12|
| |0 - Tristate and disconnect DSP -----------+ | | ||
| | (Only for external SSI use) | | | ||
| |1 - Connect DSP to multiplexer ------------' | | ||
| |00 - 25.175Mhz clock -------------------------+--+ ||
| |01 - External clock --------------------------+--+ ||
| |10 - 32Mhz clock -----------------------------+--' ||
| |0 - Handshake on, 1 - Handshake off ----------------'|
-------+-----+-----------------------------------------------------+----------
$FF8932|word |Crossbar Destination Controller |R/W (F030)
| +-----------------------------------------------------+
| |Destination: External Output BIT 3 2 1 0|
| |0 - DSP out, 1 - All others ------------------' | | ||
| |00 - Source DMA-PLAYBACK -----------------------+-+ ||
| |01 - Source DSP-XMIT ---------------------------+-+ ||
| |10 - Source External Input ---------------------+-+ ||
| |11 - Source A/D Convertor ----------------------+-' ||
| |0 - Handshake on, 1 - Handshake off ----------------'|
| +-----------------------------------------------------+
| |Destination: D/A Convertor BIT 7 6 5 4|
| |1 - Connect, 0 - Disconnect ------------------' | | ||
| |00 - Source DMA-PLAYBACK -----------------------+-+ ||
| |01 - Source DSP-XMIT ---------------------------+-+ ||
| |10 - Source External Input ---------------------+-+ ||
| |11 - Source A/D Convertor ----------------------+-' ||
| |0 - Handshake on, 1 - Handshake off ----------------'|
| +-----------------------------------------------------+
| |Destination: DMA-RECORD BIT 11 10 9 8|
| |0 - Handshaking on, src DSP-XMIT ------------+ | | ||
| |1 - Source is not DSP-XMIT ------------------' | | ||
| |00 - Source DMA-PLAYBACK -----------------------+-+ ||
| |01 - Source DSP-XMIT ---------------------------+-+ ||
| |10 - Source External Input ---------------------+-+ ||
| |11 - Source A/D Convertor ----------------------+-' ||
| |0 - Handshake on, 1 - Handshake off ----------------'|
| +-----------------------------------------------------+
| |Destination: DSP-RECORD BIT 15 14 13 12|
| |0 - Tristate and disconnect DSP -----------+ | | ||
| | (Only for external SSI use) | | | ||
| |1 - Connect DSP to multiplexer ------------' | | ||
| |00 - Source DMA-PLAYBACK ---------------------+--+ ||
| |01 - Source DSP-XMIT -------------------------+--+ ||
| |10 - Source External Input -------------------+--+ ||
| |11 - Source A/D Convertor --------------------+--' ||
| |0 - Handshake on, 1 - Handshake off ----------------'|
-------+-----+-----------------------------------------------------+----------
$FF8934|byte |Frequency Divider External Clock BIT 3 2 1 0|R/W (F030)
| |0000 - STe-Compatible mode |
| |0001 - 1111 Divide by 256 and then number |
-------+-----+-----------------------------------------------------+----------
$FF8935|byte |Frequency Divider Internal Sync BIT 3 2 1 0|R/W (F030)
| |0000 - STe-Compatible mode 1000 - 10927Hz* |
| |0001 - 49170Hz 1001 - 9834Hz |
| |0010 - 32780Hz 1010 - 8940Hz* |
| |0011 - 24585Hz 1011 - 8195Hz |
| |0100 - 19668Hz 1100 - 7565Hz* |
| |0101 - 16390Hz 1101 - 7024Hz* |
| |0110 - 14049Hz* 1110 - 6556Hz* |
| |0111 - 12292Hz 1111 - 6146Hz* |
| | * - Invalid for CODEC |
-------+-----+-----------------------------------------------------+----------
$FF8936|byte |Record Tracks Select BIT 1 0|R/W (F030)
| |00 - Record 1 Track ------------------------------+-+|
| |01 - Record 2 Tracks -----------------------------+-+|
| |10 - Record 3 Tracks -----------------------------+-+|
| |11 - Record 4 Tracks -----------------------------+-'|
-------+-----+-----------------------------------------------------+----------
$FF8937|byte |CODEC Input Source from 16bit adder BIT 1 0|R/W (F030)
| |Source: Multiplexer ------------------------------' ||
| |Source: A/D Convertor ------------------------------'|
-------+-----+-----------------------------------------------------+----------
$FF8938|byte |CODEC ADC-Input for L+R Channel BIT 1 0|R/W (F030)
| |0 - Microphone, 1 - Soundchip L R|
-------+-----+-----------------------------------------------------+----------
$FF8939|byte |Channel amplification BIT LLLL RRRR|R/W (F030)
| | Amplification is in +1.5dB steps |
-------+-----+-----------------------------------------------------+----------
$FF893A|word |Channel attenuation BIT LLLL RRRR|R/W (F030)
| | Attenuation is in -1.5dB steps |
-------+-----+-----------------------------------------------------+----------
$FF893C|byte |CODEC-Status BIT 1 0|R/W (F030)
| |Left Channel Overflow ----------------------------' ||
| |Right Channel Overflow -----------------------------'|
-------+-----+-----------------------------------------------------+----------
$FF8941|byte |GPx Data Direction BIT 2 1 0|R/W (F030)
| |0 - In, 1 - Out --------------------------------+-+-'|
| | For the GP0-GP2 pins on the DSP connector |
-------+-----+-----------------------------------------------------+----------
$FF8943|byte |GPx Data Port BIT 2 1 0|R/W (F030)
-------+-----+-----------------------------------------------------+---------- go to page 2 (of 2)
Dan Hollis
